Mauro Pagliato Email

Senior Digital Design Manager @ Ferroelectric Memory Company

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Mauro Pagliato Location

Milan, IT

Mauro Pagliato Work

2023 - now Senior Digital Design Manager @ Ferroelectric Memory Company
2012 - now Senior MTS IC Design Engineer @ SK hynix
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2020 - 2023 IC Digital Design Manager @ SK hynix

2011 - 2012 Senior MTS IC Design Engineer @ IDEAFLASH - Semiconductors
2010 - 2011 SMTS Design Engineer @ Elpida Memory (Italy)
2008 - 2010 SMTS Design Engineer @ Spansion is Cypress Semiconductor
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2000 - 2008 IC Design Engineer @ STMicroelectronics
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Mauro Pagliato Education

Politecnico di Milano
Master's degree (electronic engineering)
1992 - 1998

Mauro Pagliato Skills

Digital Design
Analog Circuit Design
Cadence Virtuoso

NCSim
Verilog
VHDL
Red Hat Linux
Awk
Perl
C

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Mauro Pagliato Summary

Mauro Pagliato, based in Milan, IT, is currently a Senior Digital Design Manager at Ferroelectric Memory Company. Mauro Pagliato brings experience from previous roles at SK Hynix Semiconductor, IDEAFLASH - Semiconductors and Elpida Memory (Italy). Mauro Pagliato holds a 1992 - 1998 Master's degree in electronic engineering @ Politecnico di Milano. With a robust skill set that includes Digital Design, Analog Circuit Design, Cadence Virtuoso, NCSim, Verilog and more. Mauro Pagliato has 1 emails on RocketReach.

Mauro Pagliato Emails

Found 1 emails

@ferroelectric-memory.com

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